The pairs are DC coupled an use an 85Ω differential termination with an embedded clock. A single NVLink is a bidirectional interface which comprises 8 differential pairs in each direction for a total of 32 wires. For supported microprocessors, the NVLink can eliminate PCIe entirely for all links.Īn NVLink channel is called a Brick (or an NVLink Brick). Although it's unlikely that NVLink would be implemented on an x86 system by either AMD or Intel, IBM has collaborated with Nvidia to support NVLink on their POWER microprocessors. It's worth noting that NVLink was also designed for CPU-GPU communication with higher bandwidth than PCIe. NVLink is designed to replace the inter-GPU-GPU communication from going over the PCIe lanes. Throughput could further improve through the use of a PCIe switch. Although direct GPU-GPU transfers and accesses were already possible using Nvidia's Unified Virtual Addressing over the PCIe bus, as the size of data sets continued to grow, the bus became a growing system bottleneck. Prior to the introduction of NVLink with Pascal (e.g., Kepler), multiple Nvidia's GPUs would sit on a shared PCIe bus.
Announced in early 2014, NVLink was designed as an alternative solution to PCI Express with higher bandwidth and additional features (e.g., shared memory) specifically designed to be compatible with Nvidia's own GPU ISA for multi-GPU systems.
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